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86802 Pages: 2

Draw the circuit diagram and layout of a 4 input NAND gate.

What is meant by pass transistor logic? What are the differences in transmission
characteristics of N MOS and P MOS transistors?
Derive expression for the switching threshold of a CMOS inverter.

What is layout design rule? What are the differences between ۸ rule and micron
rule?
Draw the circuit diagram of an Ex-OR gate in pass transistor logic.

PART C
Answer any two full questions, each carries 20 marks.

Draw the circuit diagram and explain the principle of operation of a CMOS
based static RAM cell. Explain the read and write operations. What are the
constraints on the sizes of transistors?

With block diagram illustrate the principle of operation of a square root carry
select adder. Estimate the delay of an n bit adder

Draw circuit diagram of a full adder with not more than 28 transistors in
standard CMOS logic.

What is FPGA? What are its applications? With block diagram explain its
internal architecture?

Draw the circuit diagram and explain the principle of operation of a one
transistor dynamic RAM cell. Explain the read, write and refresh operations.
With diagram illustrate the principle of operation of an array multiplier. Show

the critical path. Estimate the delay of the multiplier.
OK

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