Semester : SEMESTER 6
Subject : VLSI
Year : 2021
Term : JULY
Scheme : 2015 Full Time
Course Code : EC 304
Page:2
03000EC304052001
With block diagrams, explain the working of linear carry select adder and square
root carry select adder.
Design a 4-bit x 4-bit NAND-based ROM array and explain its working.
With necessary diagrams and equations, explain the design of carry bypass
adders
Draw a neat block diagram and discuss the operation of 4x4 bit-array multiplier.
Design a 4-bit x 4-bit NOR-based ROM array and explain its working.
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