Semester : SEMESTER 5
Subject : Digital Signal Processing
Year : 2019
Term : DECEMBER
Scheme : 2015 Full Time
Course Code : EC 301
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E192002 Pages:3
system.
y(n) = —0.1y(n — 1) + 0.2൩ — 2) + 3x(n) + 3.6x(n - 1) + 0.6x(n - 2)
b) Explain the architecture of TMS320C67xx DSP with block diagram. (10)
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