Semester : SEMESTER 5
Subject : Digital System Design
Year : 2020
Term : DECEMBER
Scheme : 2015 Full Time
Course Code : EC 361
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06000EC361122003
Explain essential hazards in asynchronous sequential networks with example.
What are the constraints to be satisfied to avoid essential hazards?
PART C
Answer any two full questions, each carries 20 marks.
Explain different kinds of PLA folding.
Describe the different test generation techniques for PLA.
Examine the Input/output block of typical FPGA with the aid of a diagram.
Describe the architecture of XC9500 CPLD with the help of a block diagram.
Draw the simplified block diagram of Xilinx XC4000 configurable logic block
and explain the various sections.
Write short notes on following:
i) Design for testability ii) Built in self-test iii) PLA folding algorithm
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