Semester : SEMESTER 5
Subject : Digital System Design
Year : 2020
Term : DECEMBER
Scheme : 2015 Full Time
Course Code : EC 361
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F 06000EC361122003 Pages: 3
Reg No.: Name:
APJ ABDUL KALAM TECHNOLOGICAL UNIVERSITY
Fifth Semester B.Tech Degree Regular and Supplementary Examination December 2020
Course Code: EC361
Course Name: DIGITAL SYSTEM DESIGN
Max. Marks: 100 Duration: 3 Hours
PARTA
Answer any two full questions, each carries 15 marks. Marks
1 a) What are iterative circuits? Design an iterative circuit for a 4-bit ripple carry (7)
adder.
b) Design a CSSN using JK-FF having a single input line ‘x’ in which binary
symbols | and 0 are applied. The network is to produce an output ‘1’ with each 37
(8)
multiple of 0 detected. All other times the output has to remain at ‘0’. Write the
proper sample sequence before starting the design.
2 a) Analyse the following fundamental mode asynchronous sequential circuit
॥
x 7
(7)
b) Design a coffee vending machine. The machine is to accept 5 and 10 rupees notes
only. The amount for a coffee is 15 rupees. (/t is not necessary that the machine (8)
gives the balance amount).
3 a) Design a fundamental mode asynchronous sequential circuit meeting the following
requirements:
i. there are two inputs x and y, and single output z.
ii. x and y never changer simultaneously. 89
iii. the output is to be same as x if y = 1. However, if y = 0, the output should
remain fixed at its last value before y became 0.
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