Semester : SEMESTER 3
Subject : Switching Theory and Logic Design
Year : 2018
Term : APRIL
Branch : COMPUTER SCIENCE AND ENGINEERING
Scheme : 2015 Full Time
Course Code : CS 203
Page:1
Reg :ہا(
Max. Marks: 100
10
b)
C3806 Pages: 2
Name:
APJ ABDUL KALAM TECHNOLOGICAL UNIVERSITY
THIRD SEMESTER B.TECH DEGREE EXAMINATION, APRIL 2018
Course Code: CS203
Course Name: SWITCHING THEORY AND LOGIC DESIGN
PART A
Answer all questions, each carries 3 marks
Perform the following operations:
1) (E39)i6 + 3F9)i6 11) (721)8 -(32)8
iii) BCD addition of 0110 0111 and 0101 0011
Perform the following conversions: (Show the steps of conversion)
i) (463.25)10 to binary ii) (36.25)10 to octal iii) (479,000) ௨1௦ binary
Using Boolean postulates simplify the following expressions:
i) X+x’y 11) Xy+x?zt+yz 111) x’y’z+x’yztxy’
Express the following functions:
i) F;=AB+B'C in sum of Minterms form.
ii) Fx=A+B’C in product of Maxterms form.
PART B
Answer any two full questions, each carries 9 marks
Perform subtraction of the following using 1*5 complement and (1-1)'5
complement methods:
i) (7235)10- (3460 ii) (1000100) - (1110100),
Given F(A, B,C,D)/= 2)1, 4, 6, 7, 8, 9, 10, 11, 15). Simplify using Quin-
McClusky method and determine the prime implicants, essential prime implicants
and the minimized Boolean expression.
Using K-map, simplify the Boolean function F in sum of products form, using the
don’t care conditions d:
F(w, ೫, y, 2) = प (ஸோ + x’y’ + xyz) + x’z’(y+w)
d(w, x, y, Z)= ए (षठ + yz’) + wyz
Give the IEEE Single precision format for floating point number representation
with explanation. Determine the floating-point binary number represented by the
following single precision floating point representation.
“1100 1010 1100 0111 0001 0000 0011 1011”
PART C
Answer all questions, each carries 3 marks
Implement F= A(B+CD) +B’C with NAND gates.
Derive the simplified Boolean output functions of a full subtractor.
Explain the terms:
i) Race-around condition 11) Edge triggering of flip-flops
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Duration: 3 Hours
Marks
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