Semester : SEMESTER 4
Subject : Digital Electronics and Logic Design
Year : 2018
Term : APRIL
Scheme : 2015 Full Time
Course Code : EE 204
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a)
b)
4809
Design a 4 bit Carry look ahead adder.
Answer any two questions, each carries 10 marks
PART D
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(10)
Design a counter to a given count sequence using T Flip flops 1, 2, 4, 6, 0, 5, (10)
Design a Flash type 2-bit ADC. What is the difficulty in designing ADCs of (10)
higher order bits?
Implement a half adder using VHDL.
Prepare the state table and excitation table for the Sequential machine shown (7)
below. Use T flip flop.
1/0
0/0
اد ೫ ೫ بد
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