Semester : SEMESTER 4
Subject : Computer Organization and Architecture
Year : 2018
Term : DECEMBER
Branch : COMPUTER SCIENCE AND ENGINEERING
Scheme : 2015 Full Time
Course Code : CS 202
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PART D
Answer any two questions. Each carries 9 marks.
Illustrate with an example SCSI bus arbitration and selection.
With the help of a diagram examine the internal organisation of bit cells in a
memory chip.
Explain the architecture of USB with help of a diagram.
Differentiate Direct and Associative mapped cache with examples.
PART E
Answer any four questions. Each carries 10 marks.
Give a simple design for generating status bits for a 8-bit ALU.
Draw a labelled block diagram of a processor unit with seven registers R1 to R7,a
status register,ALU with 3-selection variables and Cin, and shifter with 3 selection
variables.
With the help of a flowchart for sign-magnitude addition/subtraction, explain the
steps involved in developing a hardwired control unit.
Using a block diagram analyse the design of a microprogram control for a
processor unit.
What is a control word? With the help of proper illustrations and assumptions
show how a designer would compose a control word for the processor unit.
With the help of a diagram establish the functioning of microprogram sequencer
in a microprogram controlled processor.
KKK
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