No.of pages:2 A

APJ ABDUL KALAM TECHNOLOGICAL UNIVERSITY
FIRST SEMESTER M.TECH DEGREE EXAMINATION, APRIL 2021

VLSI and Embedded Systems
01EC6601 Digital System Design
Answer any two full questions from each part
Limit answers to the required points.

Max. Marks: 60 Duration: 3 hours

1)

2)

3)

4)

5)

a)

b)

a)
b)

PART A

Design the following function using PLA. Specify the PLA table.

(a) X=AB’D + ^ (+ BC + ("`

(0) Y=A’C’?+AC+C’D’

(०) 2 5 00 + ‏۶۰۳۰ھ‎ + AB’D 4.5
Design a Moore machine with output Z should be 1, if the input sequence ends in
either 011 or 1001, and Z should be 0 otherwise. Implement with T flip flops. 4.5

Write a description on PAL 22V10. 4.5
Distinguish between Mealy and Moore machine. 4.5

Design a sequential network to convert BCD to excess3 code. The input and

output will be serial with the least significant bit first. 4.5

How will you determine state equivalence using implication table? 4.5
PART B

How will you design a hazard free combinational network? 4.5

Explain FPGA design flow. 4.5

How race free assignment is determined with the help of an adjacency diagram.
4.5

Distinguish between SRAM based FPGA technology and anti- fuse based FPGA

technology. 4.5