Semester : SEMESTER 6
Subject : VLSI
Year : 2020
Term : SEPTEMBER
Scheme : 2015 Full Time
Course Code : EC 304
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ர 03000EC304052002 Pages: 2
Reg No.: Name:
APJ ABDUL KALAM TECHNOLOGICAL UNIVERSITY
Sixth semester B.Tech examinations (S), September 2020
Course Code: EC304
Course Name: VLSI
Max. Marks: 100 Duration: 3 Hours
PARTA
Answer any two full questions, each carries 15 marks Marks
1 a) What is annealing? Explain the various types. (5)
b) Illustrate with diagram, the principle of crystal growth by Czochralzki method (10)
and Float zone process. Compare these processes.
2 a) Determine the ratio of silicon consumed to the thickness of grown SiO, layer (5)
over silicon wafer. If SiOz layer of 0.4 um is 10 be grown, what would be the
thickness of used up silicon. Molecular weight of 510) = 60.08g.mole, density of
8102 =2.2g/cm* , atomic weight of Si=20.09 g.mole, density of Si =2.33g/cm*
b) Derive and explain Fick’s 1“ and 2™ laws (6)
c) What are the steps involved in photolithography process. (4)
3 ஐ Explain N-well CMOS IC fabrication sequence with neat diagrams. (9)
b) With the aid of neat diagrams explain fabrication process of transistors (6)
PART تا
Answer any two full questions, each carries 15 marks
4 a) Implement the following functions using pass standard CMOS logic (6)
i)y=aANDb_ 1) y=aXNORD
b) Draw the circuit diagram, stick diagram and layout of a CMOS inverter. (9)
5 a) Explain pass transistor logic. What are its demerits and how it can be remedied? (8)
b) Explain the DC output characteristics of CMOS inverter and discuss various (7)
regions in the characteristics.
6 a) List the various types of power dissipation in CMOS. Which type is dominant (5)
and why?
0) Explain the significance of design rules. What are the different design rules in (5)
CMOS technology?
c) Discuss transmission gates. Implement XNOR gates using transmission gate (5)
logic.
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