Semester : SEMESTER 3
Subject : Digital System Design
Year : 2020
Term : SEPTEMBER
Branch : INFORMATION TECHNOLOGY
Scheme : 2015 Full Time
Course Code : IT 201
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Reg No.: Name:
APJ ABDUL KALAM TECHNOLOGICAL UNIVERSITY
Third semester B.Tech examinations (S) September 2020
Course Code: IT201
Course Name: DIGITAL SYSTEM DESIGN
Max. Marks: 100 Duration: 3 Hours
PARTA
Answer any two full questions, each carries 15 marks. Marks
1 9) Convert the hexadecimal number (112.75); to decimal, binary and octal. (4)
b) Perform subtraction using 10’s complement and 2’s complement for 3456 - 245. (6)
c) Represent 3851.2 and 349.8 in BCD and perform addition using BCD arithmetic. (5)
2 9) Represent 320.625 in single precision floating point representation (5)
b) Simplify the following Boolean function into (1) sum-of-products form 320 (8)
(ii) product-of-sums form:
F (A, 3, ©, D) = Yn(0, 1, 2, 5, 8, 9, 10)
c) Determine the base of the number in the operation 155+12=200 (2)
3 9) Simplify the following functions using Quine- McClusky method : (7)
F கூத = 2%(3,4,5,6,7, 11, 12, 14, 15)
b) Using K-map simplify following Boolean expressions & give implementation of (8)
same using gates
F(A,B,C,D)=AB(C+D)+A (B+C+BCD)
d(A,B,C,D)=ABC+ABCD+ABC
PART تا
Answer any two full questions, each carries 15 marks.
4 9) Implement 8x1 MUX using 4x1 MUX. (8)
b) Design & implement Full Adder with truth table. (5)
c) Explain the functioning a D-Flip Flop with its circuit. (2)
5 2) Derive the circuit for two bit magnitude comparator (5)
b) Design a sequential circuit with two D Flip-Flops, A and 8, and one input x. (10)
When x = 0, then the state of the circuit remains the same. When x =1, the circuit
goes through the state transitions from 00 to 01 to 11 to 10 back to 00, and
repeats.
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