Peripheral Component Interconnect (PCI) Bus _

Independent from the IBM architecture.

_ Number of embedded devices in a computer system use PCI

_ Three standards for the devices interfacing with the PC

_ PCI 3201/33 MHz, and 64bit/66 MHz

_ PCI Extended (PCI/X) 64 bit/100 MHz ,

_ Compact PCI (८ PCI) Bus

Two super speed versions

_ PCI Super V2.3 264/528 MBps 3.3۷ (on64- bit bus), and 132/264 (on 32-bit bus)and _
PCI-X Super V1.01a for 800MBps 64- bit bus 3.3 Volt.

PCI bridge

_ PCI bus interface switches a processor communication with the memory bus to PCI bus.

_ In most systems, the processor has a single data bus that connects to a switch module _
Some processors integrate the switch module onto the same integrated circuit as the processor

to reduce the number of chips required to build a system and thus the system cost.

_ communicates with the memory through a memory bus (a set of address, control and data
buses),a dedicated set of wires that transfer data between these two systems.

_A separate 1/0 bus connects the PCI switch to the I/O devices.

Advantage of Separate memory and I/O buses

_ I/O system generally designed for maximum flexibility, to allow as many different I/O
devices as

possible to interface to the computer

_ Memory bus is designed to provide the maximum-possible bandwidth between the
processor and the memory system.

PCI-X (PCI extended)

* 133 MBps to as much as 1 GBps

* Backward compatible with existing PCI cards and Giga bit Ethernet)

* Maximum 264 MBps throughput, uses 8,16, 32, or 64 bit transfers

* Used in high ban dwidth devices(Fiber Channel, and processors 8
٠ 6U cards contain additional pins for user defined I/Os ര

* Live insertion support (Hot-Swap),
* Supports two independent buses on the back plane (on different connectors)

* Supports Ethernet, Infiniband, and Star Fabric support (Switched fabric based systems)