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PART ^
Answer any two full questions, each carries 20 marks.
7 a) Design a circuit to convert 1 KHz, 50% duty cyclesquare wave to 1 KHz, 30% (7) duty cycle
rectangular wave.
b) How to configure fold back current limiting protection in 723 voltage regulator (7)
IC. Explain the circuit with internal block diagram of the IC.
c) What is the principle of operation of successive approximation ADC? (6)
8 9) Illustrate the principle of operation of PLL with its capture range and lock range
b) How phase detector is implemented in digital PLL?
c) Design a circuit to multiply the incoming frequency by a factor of 5 using 565
PLL.
9 a)Find out the Dynamic range, Full-scale value and Resolution of a 12 bit DAC
having full-scale range 10V.
b) Explain the working principle of R-2R ladder type DAC with circuit.
c) What is the principle of operation of Dual slope ADC. Deduce the relationship

between analogue input and digital output of the ADC.

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