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Reg No.: Name:
APJ ABDUL KALAM TECHNOLOGICAL UNIVERSITY
Third Semester B.Tech Degree (S,FE) Examination January 2022 (2015 Scheme)

Course Code: EE203
Course Name: ANALOG ELECTRONICS CIRCUITS

Max. Marks: 100 Duration: 3 Hours
PART A
Answer all questions, each carries 5 marks. Marks
1 Derive an expression for the collector current Ic and Vcg in the case of collector (5)

to base biasing in CE amplifier with the circuit diagram and describe how
operating point stabilization is provided by this biasing method.

2 Draw a Source follower circuit using JFET and derive the expression for (5)
voltage gain.

3 Define the terms collector efficiency and distortion in power amplifiers and (5)
determine the a). power rating of transistor b). maximum ac power output and
c). maximum collector efficiency of a class A power amplifier having zero
signal collector current of 150mA with collector supply voltage of 6V.

+ Explain the principle of feedback in oscillators based on Barkhausen’s criterion (5)
Draw the circuit diagrams for an op-amp used as a Zero crossing detector and ൭5 (5)
a voltage level detector. Show typical input and output waveforms

6 Discuss in detail the operation of 3 input summing amplifier using op-amp with (5)
suitable diagrams and derive the equation for output voltage in terms of input

voltage and circuit components.

7 Design an astable multivibrator using 555 timer of frequency 200Hz and duty (5)
cycle of 70%.
8 Draw and explain the working of a triangular wave generator using opamp. (5)
PART ‏تا‎
‎Answer any two full questions, each carries 10 marks.
9 ஐ With circuit diagram explain bias compensation using thermistor. (5)

b) For an N-channel JFET with a voltage divider biasing circuit has the following (5)
parameters, ‏دملا‎ -3.8V and Ipss=9mA, Vpp=17V, R =2kQ, Rp=2kQ,

R;=500kQ and R2=85kQ. Calculate the drain current Ip and Drain Source
VoltageV ps

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