B D1012 Pages: 2

Reg No.:_ Name:

APJ ABDUL KALAM TECHNOLOGICAL UNIVERSITY
FOURTH SEMESTER B.TECH DEGREE EXAMINATION(R&S), MAY 2019
Course Code: CS202
Course Name: COMPUTER ORGANISATION AND ARCHITECTURE (CS, IT)

Max. Marks: 100 Duration: 3 Hours
PARTA
Answer all questions,each carries 3 marks
1 Explain one, two and three address instruction with an example for each. 3
2 List the steps involved in invoking a subroutine through the use of a link register. 3
3 Draw a 3 x 2 array multiplier. 3
4 Non-restoring division is faster than restoring division. Justify the statement. 3

PART 13
Answer any two questions, each carries 9 marks
5 List various addressing modes explain any four with an example for each. 9
6 93) Draw the diagram of a multi-bus organization with 3 buses. Write the control
sequence for the instruction Add 1२4, 1२5, R6 for the above mentioned multi-bus
organization. 5
b) Give the sequence of control steps required to perform the operation Add [R3], 1
in a single-bus organization. 4
7 ഒ) _ Divide (1000)2 by (11)2 using restoring division method.
b) Illustrate the basic operational concepts in transferring data between main memory

and processor with neat diagram.

PART C
Answer all question, each carries 3 marks
8 What are vectored interrupts? 3
9 Give the functions of initiator and target controllers in SCSI bus.
3
10 Compare synchronous and asynchronous DRAM. 3
11 Define temporal locality and spatial locality. 3
PART D

Answer any two questions, each carries 9 marks
12 ஐ Differentiate centralized and distributed bus arbitration mechanism used in DMA. 4

b) Give the structure of a typical static RAM cell and explain its read and write 5

operations.

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