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APJ ABDUL KALAM TECHNOLOGICAL UNIVERSITY
FIFTH SEMESTER B.TECH DEGREE EXAMINATION, DECEMBER 2018
Course Code: CS305
Course Name: MICROPROCESSORS AND MICROCONTROLLERS

Max. Marks: 100 Duration: 3 Hours
PARTA
Answer all questions, each carries 3 marks. Marks
1 How does the 8086 processor access a word from an odd memory location? (3)
Howmany memory cycles does it take?
2 Find the physical address of the destination operands referred in the following (3)

instructions, if DS=0223H, DI=0CCCH and SI=1234H
a) MOV [൧]. AL
b) MOV [SI][56H], BL

3 What is the difference in the execution of an 8086 inter-segment and intra- (3)
segment CALL instruction?
4 Define the functions of the following 8086 assembler directives: (3)

a) ASSUME 0) EQU 0) OFFSET

PART B
Answer any two full questions, each carries 9 marks.
5 Draw the Memory Read timing diagram of 8086 in Minimum mode. Describe )9(
the status of the relevant signals during each clock period.
6 Explain the addressing modes supported by 8086 with one example for each. (9)
7 Write an 8086 assembly language program to find the count of even and odd (9)

numbers from a set of 10 sixteen bit numbers stored in location staring from a
known address. Store the results in two different locations,

PART C
Answer all questions, each carries 3 marks.
8 Write the condition(s) which cause 8086 to perform a Type 1, Type 2 and (3)
Type 3 interrupts.
9 Discuss 8086 interrupt acknowledgement cycle. (3)
10 Differentiate between I/O mapped I/O and memory mapped 1/0. (3)
11 Write short notes on scanned keyboard mode with 2-key lockout of 8279 (3)

keyboard/display controller.
PART D
Answer any two full questions, each carries 9 marks.

12 Draw the architectural block diagram of 8259 Programmable Interrupt (9)
Controller and explain the role of each functional part.
13 ஐ ~=What do you mean by Interrupt Vector Table (IVT)? The starting address for a
type 7 interrupt-service procedure is 1112:1314. Show where and in what (5)
order this address should be placed in the 8086 IVT.
b) Briefly describe the control word format of 8255 PPI. (4)
14 Design an interface between 8086 CPU and two chips of 16 x 8 EPROM ൧0 (9)
two chips of 32K x 8 RAM. Select the starting address of EPROM suitably.
The RAM address must start at 0000077

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