Semester : SEMESTER 4
Subject : Computer Organization
Year : 2018
Term : APRIL
Scheme : 2015 Full Time
Course Code : EC 206
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D4811 Pages: 2
central signals. Explain clearly.
What are the 3 advantages of multi cycle processor over single cycle processor?
PART C
Answer any two full questions, each carries 20 marks
Define Miss Rate, Hit Rate and Average memory access time.
What is meant by ROM? Explain the various types of ROM.
Explain with a diagram how virtual memory address is translated to physical
address using page table.
Explain the working of DRAM and SRAM with neat diagram.
Explain the various data transfer methods.
Explain direct mapping in cache memory with diagram.
What are the write policy classifications of cache memory? Explain.
What is the role of TLB (Translation Look aside Buffer) in virtual address
translation?
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