Semester : SEMESTER 3
Subject : Analog Electronic Circuits
Year : 2020
Term : DECEMBER
Scheme : 2015 Full Time
Course Code : EE 203
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Reg No.: Name:
APJ ABDUL KALAM TECHNOLOGICAL UNIVERSITY
Third Semester B.Tech Degree (S,FE) Examination December 2020 (2015 Scheme)
Course Code: EE203
Course Name: ANALOG ELECTRONIC CIRCUITS
Max. Marks: 100 Duration: 3 Hours
PARTA
Answer all questions, each carries 5 marks. Marks
1 With neat circuit diagram, explain the working of two level clipper. (5)
2 Explain construction and operation of depletion type metal oxide (5)
semiconductor FET with neat diagram.
3 An amplifier has a mid frequency gain of 100 and bandwidth of 200kHz. What (5)
will be the new gain and bandwidth if 5% negative feedback is introduced?
4 What are the characteristics of ideal op-amp? Compare it with practical opamp? (5)
Explain the working of zero crossing detector. (5)
6 Design an adder circuit to get the output voltage as Vg = - [2V,+3V2+4V3], (5)
where V;, V2 and V3 are inputs to Op-Amp.
7 Draw and explain square wave generator using op —amp. (5)
8 Differentiate between astable and monostable multivibrator operation with (5)
waveforms.
PART B
Answer any two full questions, each carries 10 marks.
9 a) Derive the equation for voltage gain and current gain for a BJT using 0 - (൭)
parameter model for Common Emitter configuration.
b) A CE amplifier has the h-parameters given by நடி = 100042, hye = 2.5 x 104, (4)
hge = 50 and hoe = 25 x 10° A/V. If the load resistance Ry, = 10kQ and source
resistance is 100 42, determine the (a) current gain and (b) voltage gain.
10 2) Ina potential divider biasing circuit, ४८८ = 22۷, Ri = 39kQ, Ro = 3.9kQ, (5)
Re = 1.5kQ, Re = 10kQ, B=100. Determine the operating point.
b) Explain how FET can be used as a voltage controlled resistance. (5)
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