S)With the help of necessary equations , explain how the switching activity affects power
consumption of CMOS devices. Also explain different techniques to reduce the switching
activity of CMOS devices.

(9 marks)
6) a) Compare the performance of Array multiplier with Carry- Save multiplier using

necessary diagrams.

b)Explain in detail about any one power reduction techniques done while designing a CMOS
circuit

(4.5 X 2=9 marks)
Part C (Answer any TWO Questions)

7)a) Explain the working of4x4 MOS NAND ROM.

b) Explain the working of flash memory with transistor level circuit duiagram.

(6 X 2—12 marks)

8)Compare the structure and working of Dynamic 2 to 4 NOR and
NANDDecoder
s. (12 marks)
9) a)Describe the operation of3T dynamic memory cell using timing diagram.
b)Briefly explain the working ofbasic differential sense amplifier circuit.

(6X 2=12 marks)