E R3958 Pages: 2
Reg No.: Name:

APJ ABDUL KALAM TECHNOLOGICAL UNIVERSITY
THIRD SEMESTER B.TECH DEGREE EXAMINATION, DECEMBER 2018
Course Code: EC207
Course Name: LOGIC CIRCUIT DESIGN (EC, AE)
Max. Marks: 100 Duration: 3 Hours

PART A
Answer any two full questions, each carries 15 marks. Marks

1 a) Convert the following (8)

(i) (AB6)16 to Decimal (iii) (543.26) 10 into Octal
(ii) (247.36)s into Hexa Decimal (iv) (AF9.BOD)i6 into
Binary

b) Consider the signed binary numbers A = 01000110 and B = 11010011 where B (7 ) is
in 2’s complement form. Find the value of the following mathematical expression

(i) A+B
(ii) கறு
(iii) B-A

2 a) Hamming code was used to generate parity for a nibble. If received bit sequence (8) is
0101010 then write correct bit sequence with (i) Even parity (ii) Odd parity
b) Explain the operation of a 8x1 multiplexer and implement the following using
(7)
an 8x1 multiplexer
F(A, 8, ©, D) = ¥ m (0, 1, 3, 5, 6, 7, 8, 9, 11, 13, 14)
3 a) Minimize the following logic function using K- maps and realize using NAND (10) gates
alone
F(A, 8, ©, D) = ¥ m (0, 3, 5, 8, 9, 11,15) + 6 (2, 3)

b) Design a magnitude comparator to compare two 2-bit numbers A = ൧൧0 and

(5)
B = BiBo

PART 8
Answer any two full questions, each carries 15 marks.
4 a) Draw the circuit and explain the operation of TTL NAND gate (10) b) Compare TTL, CMOS
logic families in terms of fan-in, fan-out, supply voltage, ( 5)

propagation delay, power dissipation and noise margin

5 a) Implement the following function using PLA (8)
11 (4.9, 2)5 2.11 ( 1, 2, 4, 6)
F2(x, $, 2) = 2.1 (0,1, 6, 7)

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